Form 4: AMD CTO Mark Papermaster Exercises Options and Sells Shares Under Pre-Arranged Trading Plan
Insider Trading Report
Advanced Micro Devices' Chief Technology Officer, Mark Papermaster, executed a pre-arranged sale of 17,500 shares of common stock on June 13, 2025, following the exercise of stock options.
Summary
- Mark Papermaster, Chief Technology Officer and Executive Vice President of Advanced Micro Devices Inc. (AMD), engaged in stock transactions on June 13, 2025.
- He acquired 17,500 shares of AMD common stock by exercising stock options at an exercise price of $19.1 per share.
- Concurrently, he disposed of 17,500 shares of AMD common stock through two separate sales.
- The first sale involved 16,586 shares at a weighted average price of $115.97 per share, with prices ranging from $115.50 to $116.48.
- The second sale involved 914 shares at a weighted average price of $116.54 per share, with prices ranging from $116.50 to $116.64.
- All transactions were conducted pursuant to a Rule 10b5-1 trading plan adopted by Mr. Papermaster on November 5, 2024.
- Following these transactions, Mr. Papermaster's direct beneficial ownership of common stock is 1,713,710 shares, and he holds 17,998 derivative securities (stock options).
Sentiment
Score: 6
Explanation: The sentiment is neutral to slightly positive. While an insider sale might be seen as negative, the fact that it's a pre-planned Rule 10b5-1 transaction mitigates any negative interpretation, making it a routine event. The executive is realizing value from vested options, which is a positive for the individual.
Positives
- The transactions were executed under a pre-arranged Rule 10b5-1 trading plan, indicating a systematic and non-discretionary approach to managing equity compensation.
- The exercise of options at a low price ($19.1) and subsequent sale at significantly higher market prices ($115.97 and $116.54) demonstrates the executive's realization of substantial value from long-term equity compensation.
Negatives
- The sale of 17,500 shares by a key executive, even if pre-planned, represents a reduction in direct insider ownership, which some investors might interpret as a slight negative signal, though it is a common practice for compensation management.
Risks
- No specific risks related to the company's operations or financial health are mentioned in this Form 4 filing, as it primarily reports insider trading activity.
Future Outlook
NA
Industry Context
This Form 4 filing details routine insider transactions for an executive at a major semiconductor company. Such transactions are common for managing equity compensation and do not inherently reflect broader industry trends or competitive positioning, though they are part of the overall market activity within the technology sector.
Stakeholder Impact
- Shareholders: The sale of shares by a key executive, while routine under a 10b5-1 plan, slightly reduces direct insider ownership. However, it does not indicate a lack of confidence in the company's future, as it's a pre-planned compensation management activity.
- Employees: No direct impact on employees is indicated by this filing.
- Customers/Suppliers/Creditors: No direct impact on these stakeholders is indicated by this filing.
Next Steps
- No specific future actions or milestones for the company are mentioned in this insider trading report.
Key Dates
| Date | Description |
|---|---|
| 2019-08-09 | First vesting date for stock options (1/3 of options). |
| 2020-08-09 | Second vesting date for stock options (1/3 of options). |
| 2021-08-09 | Third vesting date for stock options (1/3 of options). |
| 2024-11-05 | Date Rule 10b5-1 trading plan was adopted by Mark Papermaster. |
| 2025-06-13 | Date of stock option exercise and subsequent sale transactions. |
| 2025-06-16 | Date the Form 4 was signed. |
| 2025-08-09 | Expiration date of the exercised stock options. |
Recommendation
holdKeywords
Advanced Micro Devices, AMD, Mark Papermaster, SEC Form 4, Insider Trading, Stock Option Exercise, Share Sale, Rule 10b5-1 Plan, Executive Compensation, Technology Sector, Semiconductor
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